Changeset 1726
- Timestamp:
- 09/22/06 18:01:25 (2 years ago)
- Files:
-
- trunk/Makefile (modified) (1 diff)
- trunk/Makefile.inc (modified) (1 diff)
- trunk/ath/Makefile (modified) (3 diffs)
- trunk/ath/Makefile.kernel (modified) (3 diffs)
- trunk/ath/ah_osdep.c (deleted)
- trunk/ath/if_athvar.h (modified) (1 diff)
- trunk/ath_hal (added)
- trunk/ath_hal/Makefile (added)
- trunk/ath_hal/Makefile.kernel (added)
- trunk/ath_hal/ah_os.c (copied) (copied from trunk/hal/linux/ah_osdep.c) (3 diffs)
- trunk/ath_hal/ah_os.h (copied) (copied from trunk/hal/linux/ah_osdep.h) (8 diffs)
- trunk/ath_hal/ah_osdep.h (copied) (copied from trunk/hal/linux/ah_osdep.h) (3 diffs)
- trunk/ath_hal/uudecode.c (moved) (moved from trunk/ath/uudecode.c)
- trunk/ath_rate/amrr/Makefile (modified) (1 diff)
- trunk/ath_rate/onoe/Makefile (modified) (1 diff)
- trunk/ath_rate/sample/Makefile (modified) (1 diff)
- trunk/hal/ah.h (modified) (1 diff)
- trunk/hal/linux (deleted)
- trunk/net80211/Makefile (modified) (1 diff)
Legend:
- Unmodified
- Added
- Removed
- Modified
- Copied
- Moved
trunk/Makefile
r1686 r1726 49 49 include $(obj)/Makefile.inc 50 50 51 DIRS_MODULES = $(ATH) $(ATH_ RATE) $(WLAN)51 DIRS_MODULES = $(ATH) $(ATH_HAL) $(ATH_RATE) $(WLAN) 52 52 53 obj-y := ath/ $(ATH_RATE)/ net80211/53 obj-y := ath/ ath_hal/ $(ATH_RATE)/ net80211/ 54 54 55 55 all: modules tools trunk/Makefile.inc
r1686 r1726 164 164 endif 165 165 # 166 # 167 # Path to HAL/OS interface code 168 # 169 ATH_HAL= $(obj)/$(DEPTH)/ath_hal 166 170 # Path to the 802.11 include files. 167 171 # trunk/ath/Makefile
r1686 r1726 57 57 include $(obj)/$(DEPTH)/Makefile.inc 58 58 59 obj-m += ath_$(BUSNAME).o ath_hal.o59 obj-m += ath_$(BUSNAME).o 60 60 ath_$(BUSNAME)-objs := if_ath.o if_ath_$(BUSNAME).o 61 ath_hal-objs := ah_osdep.o $(TARGET).hal.o62 61 63 hostprogs-y := uudecode 64 65 # For older 2.6 kernels 66 host-progs := $(hostprogs-y) 67 68 ifdef LINUX24 69 export-objs := ah_osdep.o 70 endif 71 72 INCS+= -I$(HAL) -I$(obj) -I$(HAL)/$(OS) -I$(obj)/$(WLAN) -I$(obj)/$(DEPTH) 62 INCS+= -I$(HAL) -I$(ATH_HAL) -I$(obj) -I$(obj)/$(WLAN) -I$(obj)/$(DEPTH) 73 63 74 64 EXTRA_CFLAGS+= $(INCS) $(COPTS) -DOPT_AH_H=\"$(HAL)/public/$(TARGET).opt_ah.h\" … … 78 68 all: 79 69 $(MAKE) -C $(KERNELPATH) SUBDIRS=$(shell pwd) modules 80 81 ifdef LINUX2482 $(obj)/uudecode: $(obj)/uudecode.c83 $(HOSTCC) $(HOSTCFLAGS) -o $@ $<84 endif85 86 quiet_cmd_uudecode = UUDECODE $@87 cmd_uudecode = $(obj)/uudecode -o $@ $<88 89 $(obj)/$(TARGET).hal.o: $(HAL)/public/$(TARGET).hal.o.uu $(obj)/uudecode90 ifdef LINUX2491 $(Q)$(obj)/uudecode -o $@ $<92 else93 $(call if_changed,uudecode)94 endif95 70 96 71 install: … … 106 81 ath_$(BUSNAME).o: $(ath_$(BUSNAME)-objs) 107 82 $(LD) $(LDOPTS) -o ath_$(BUSNAME).$(KMODSUF) -r $(ath_$(BUSNAME)-objs) 108 109 ath_hal.o: $(ath_hal-objs)110 $(LD) $(LDOPTS) -o ath_hal.$(KMODSUF) -r $(ath_hal-objs)trunk/ath/Makefile.kernel
r1686 r1726 13 13 COMPAT= $(srctree)/$(src)/../include 14 14 15 16 # Determine endianess. Note that it's not indicated for some CPUs at17 # all, so this value is only valid for certain processors.18 ifeq ($(filter-out arm%,$(ARCH)),)19 ENDIAN = le20 endif21 22 ifeq ($(filter-out mips%,$(ARCH)),)23 ENDIAN = be24 endif25 26 ifneq ($(CONFIG_CPU_BIG_ENDIAN)$(CONFIG_BIG_ENDIAN),)27 ENDIAN = be28 endif29 30 ifneq ($(CONFIG_CPU_LITTLE_ENDIAN)$(CONFIG_LITTLE_ENDIAN),)31 ENDIAN = le32 endif33 34 # Determine the target (i.e. which HAL to use).35 # The default is $(ARCH)-elf36 TARGET-$(CONFIG_CPU_32v4) = armv4-$(ENDIAN)-elf37 TARGET-$(CONFIG_CPU_MIPS32_R1) = mips1-$(ENDIAN)-elf38 TARGET-$(CONFIG_CPU_MIPS32_R2) = mips-$(ENDIAN)-elf39 TARGET-$(CONFIG_CPU_R4X00) = mipsisa32-$(ENDIAN)-elf40 TARGET-$(CONFIG_CPU_TX49XX) = mipsisa32-$(ENDIAN)-elf41 TARGET-$(CONFIG_PPC32) = powerpc-be-elf42 TARGET-$(CONFIG_CPU_SH4) = sh4-le-elf43 TARGET-$(CONFIG_SPARC32) = sparc-be-elf44 TARGET-$(CONFIG_SPARC64) = sparc64-be-elf45 TARGET-$(CONFIG_CPU_SA110) = xscale-$(ENDIAN)-elf46 TARGET-$(CONFIG_CPU_SA1100) = xscale-$(ENDIAN)-elf47 TARGET-$(CONFIG_CPU_XSCALE) = xscale-$(ENDIAN)-elf48 49 TARGET = $(if $(TARGET-y),$(TARGET-y),$(ARCH)-elf)50 51 52 15 # 53 16 # Select bus-specific code. Note that this defaults to PCI. … … 61 24 endif 62 25 63 INCS = -include $(COMPAT)/compat.h -I$(COMPAT) -I$(HAL) -I$(HAL)/linux\26 INCS = -include $(COMPAT)/compat.h -I$(COMPAT) -I$(HAL) \ 64 27 -I$(WLAN) -I$(src)/.. -I$(src) 65 28 … … 67 30 68 31 ifdef LINUX26 69 obj-$(CONFIG_ATHEROS) += ath_$(BUSNAME).o ath_hal.o32 obj-$(CONFIG_ATHEROS) += ath_$(BUSNAME).o 70 33 ath_$(BUSNAME)-objs := if_ath.o if_ath_$(BUSNAME).o 71 ath_hal-objs := ah_osdep.o $(TARGET).hal.o72 73 hostprogs-y := uudecode74 host-progs := $(hostprogs-y)75 34 endif 76 35 77 36 ifdef LINUX24 78 37 obj-$(CONFIG_ATHEROS) := if_ath.o if_ath_$(BUSNAME).o 79 obj-$(CONFIG_ATHEROS) += ah_osdep.o $(TARGET).hal.o80 38 81 O_TARGET := ath_$(BUSNAME).o ath_hal.o39 O_TARGET := ath_$(BUSNAME).o 82 40 include $(TOPDIR)/Rules.make 83 41 84 export-objs := if_ath_$(BUSNAME).o ah_osdep.o 85 list-multi := ath_$(BUSNAME).o ath_hal.o 86 87 uudecode: uudecode.c 88 $(HOSTCC) $(HOSTCFLAGS) -o $@ $< 42 export-objs := if_ath_$(BUSNAME).o 43 list-multi := ath_$(BUSNAME).o 89 44 endif 90 91 $(obj)/$(TARGET).hal.o: $(HAL)/public/$(TARGET).hal.o.uu $(obj)/uudecode92 $(Q)echo "deps_$@ :=" >$(@D)/.$(@F).cmd93 $(Q)$(obj)/uudecode -o $@ $<trunk/ath/if_athvar.h
r1714 r1726 44 44 45 45 #include "ah.h" 46 #include "ah_os.h" 46 47 #include "if_athioctl.h" 47 48 #include "net80211/ieee80211.h" /* XXX for WME_NUM_AC */ trunk/ath_hal/ah_os.c
r1721 r1726 1 1 /*- 2 * Copyright (c) 2002-2006 Sam Leffler, Errno Consulting, Atheros 3 * Communications, Inc. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms are permitted 6 * provided that the following conditions are met: 7 * 1. The materials contained herein are unmodified and are used 8 * unmodified. 9 * 2. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following NO 11 * ''WARRANTY'' disclaimer below (''Disclaimer''), without 12 * modification. 13 * 3. Redistributions in binary form must reproduce at minimum a 14 * disclaimer similar to the Disclaimer below and any redistribution 15 * must be conditioned upon including a substantially similar 16 * Disclaimer requirement for further binary redistribution. 17 * 4. Neither the names of the above-listed copyright holders nor the 18 * names of any contributors may be used to endorse or promote 19 * product derived from this software without specific prior written 20 * permission. 2 * Copyright (c) 2002-2006 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 3. Neither the names of the above-listed copyright holders nor the names 16 * of any contributors may be used to endorse or promote products derived 17 * from this software without specific prior written permission. 18 * 19 * Alternatively, this software may be distributed under the terms of the 20 * GNU General Public License ("GPL") version 2 as published by the Free 21 * Software Foundation. 21 22 * 22 23 * NO WARRANTY 23 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 24 * ''AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 25 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, 26 * MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 27 * IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE 28 * FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 29 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 30 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 31 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 33 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGES. 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 27 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 28 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 29 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 32 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 34 * THE POSSIBILITY OF SUCH DAMAGES. 35 35 * 36 36 * $Id$ … … 58 58 #include <asm/io.h> 59 59 60 #include "ah.h" 60 #include <ah.h> 61 #include <ah_os.h> 61 62 62 63 #ifndef __MOD_INC_USE_COUNT … … 82 83 struct ath_hal * 83 84 _ath_hal_attach(u_int16_t devid, HAL_SOFTC sc, 84 HAL_BUS_TAG t, HAL_BUS_HANDLE h, void* s) 85 { 86 HAL_STATUS status; 87 struct ath_hal *ah = ath_hal_attach(devid, sc, t, h, &status); 88 89 *(HAL_STATUS *)s = status; 85 HAL_BUS_TAG t, HAL_BUS_HANDLE h, HAL_STATUS *s) 86 { 87 struct ath_hal *ah = ath_hal_attach(devid, sc, t, h, s); 88 90 89 if (ah) 91 90 AH_MOD_INC_USE_COUNT(THIS_MODULE); trunk/ath_hal/ah_os.h
r1722 r1726 1 1 /*- 2 * Copyright (c) 2002-2006 Sam Leffler, Errno Consulting , Atheros3 * Communications, Inc.All rights reserved.2 * Copyright (c) 2002-2006 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 4 * 5 * Redistribution and use in source and binary forms are permitted 6 * provided that the following conditions are met: 7 * 1. The materials contained herein are unmodified and are used 8 * unmodified. 9 * 2. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following NO 11 * ''WARRANTY'' disclaimer below (''Disclaimer''), without 12 * modification. 13 * 3. Redistributions in binary form must reproduce at minimum a 14 * disclaimer similar to the Disclaimer below and any redistribution 15 * must be conditioned upon including a substantially similar 16 * Disclaimer requirement for further binary redistribution. 17 * 4. Neither the names of the above-listed copyright holders nor the 18 * names of any contributors may be used to endorse or promote 19 * product derived from this software without specific prior written 20 * permission. 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 3. Neither the names of the above-listed copyright holders nor the names 16 * of any contributors may be used to endorse or promote products derived 17 * from this software without specific prior written permission. 18 * 19 * Alternatively, this software may be distributed under the terms of the 20 * GNU General Public License ("GPL") version 2 as published by the Free 21 * Software Foundation. 21 22 * 22 23 * NO WARRANTY 23 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 24 * ''AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 25 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, 26 * MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 27 * IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE 28 * FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 29 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 30 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 31 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 33 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGES. 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 27 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 28 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 29 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 32 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 34 * THE POSSIBILITY OF SUCH DAMAGES. 35 35 * 36 36 * $Id$ 37 37 */ 38 #ifndef _ATH_AH_OSDEP_H_ 39 #define _ATH_AH_OSDEP_H_ 38 #ifndef _ATH_AH_OS_H_ 39 #define _ATH_AH_OS_H_ 40 41 #include <ah.h> 42 40 43 /* 41 44 * Atheros Hardware Access Layer (HAL) OS Dependent Definitions. 42 45 */ 43 44 /*45 * Starting with 2.6.4 the kernel supports a configuration option46 * to pass parameters in registers. If this is enabled we must47 * mark all function interfaces in+out of the HAL to pass parameters48 * on the stack as this is the convention used internally (for49 * maximum portability).50 */51 #ifdef CONFIG_REGPARM52 #define __ahdecl __attribute__((regparm(0)))53 #else54 #define __ahdecl55 #endif56 #ifndef __packed57 #define __packed __attribute__((__packed__))58 #endif59 46 60 47 /* … … 65 52 #ifndef _LINUX_TYPES_H 66 53 /* NB: arm defaults to unsigned so be explicit */ 67 typedef signed char int8_t;68 typedef short int16_t;69 typedef int int32_t;70 typedef long long int64_t;54 typedef signed char int8_t; 55 typedef short int16_t; 56 typedef int int32_t; 57 typedef long long int64_t; 71 58 72 typedef unsigned char u_int8_t;73 typedef unsigned short u_int16_t;74 typedef unsigned int u_int32_t;75 typedef unsigned long long u_int64_t;59 typedef unsigned char u_int8_t; 60 typedef unsigned short u_int16_t; 61 typedef unsigned int u_int32_t; 62 typedef unsigned long long u_int64_t; 76 63 77 typedef unsigned int size_t;78 typedef unsigned int u_int;79 typedef void *va_list;64 typedef unsigned int size_t; 65 typedef unsigned int u_int; 66 typedef void* va_list; 80 67 #endif 81 68 … … 88 75 #define OS_INLINE __inline 89 76 90 /* 91 * Delay n microseconds. 92 */ 77 /* Delay n microseconds. */ 93 78 extern void __ahdecl ath_hal_delay(int); 94 #define OS_DELAY(_n) ath_hal_delay(_n)79 #define OS_DELAY(_n) ath_hal_delay(_n) 95 80 96 81 #define OS_MEMZERO(_a, _n) ath_hal_memzero((_a), (_n)) … … 100 85 101 86 #ifndef abs 102 #define abs(_a) __builtin_abs(_a)87 #define abs(_a) __builtin_abs(_a) 103 88 #endif 104 89 … … 107 92 #define OS_GETUPTIME(_ah) ath_hal_getuptime(_ah) 108 93 109 /* 110 * Byte order/swapping support. 111 */ 94 /* Byte order/swapping support. */ 112 95 #define AH_LITTLE_ENDIAN 1234 113 96 #define AH_BIG_ENDIAN 4321 … … 130 113 #endif /* AH_BYTE_ORDER */ 131 114 132 #if AH_BYTE_ORDER == AH_BIG_ENDIAN133 115 /* 134 * This could be optimized but since we only use it for 135 * a few registers there's little reason to do so. 136 */ 137 static __inline__ u_int32_t 138 __bswap32(u_int32_t _x) 139 { 140 return ((u_int32_t)( 141 (((const u_int8_t *)(&_x))[0] ) | 142 (((const u_int8_t *)(&_x))[1]<< 8) | 143 (((const u_int8_t *)(&_x))[2]<<16) | 144 (((const u_int8_t *)(&_x))[3]<<24)) 145 ); 146 } 147 #else 148 #define __bswap32(_x) (_x) 149 #endif 150 151 /* 152 * Register read/write; we assume the registers will always 153 * be memory-mapped. Note that register accesses are done 154 * using target-specific functions when debugging is enabled 155 * (AH_DEBUG) or we are explicitly configured this way. The 156 * latter is used on some platforms where the full i/o space 157 * cannot be directly mapped. 116 * Note that register accesses are done using target-specific 117 * functions when debugging is enabled (AH_DEBUG) or we are 118 * explicitly configured this way. 158 119 * 159 120 * The hardware registers are native little-endian byte order. … … 164 125 * Most of this code is collapsed at compile time because the 165 126 * register values are constants. 127 * 128 * Presumably when talking about hardware byte-swapping, the above 129 * text is referring to the Atheros chipset, as the registers 130 * referred to are in the PCI memory address space, and these are 131 * never byte-swapped by PCI chipsets or bridges, but always 132 * written directly (i.e. the format defined by the manufacturer). 166 133 */ 167 #if AH_BYTE_ORDER == AH_BIG_ENDIAN 168 #define _OS_REG_WRITE(_ah, _reg, _val) do { \ 169 if ( (_reg) >= 0x4000 && (_reg) < 0x5000) \ 170 *((volatile u_int32_t *)((_ah)->ah_sh + (_reg))) = \ 171 __bswap32((_val)); \ 172 else \ 173 *((volatile u_int32_t *)((_ah)->ah_sh + (_reg))) = (_val); \ 134 135 #if (AH_BYTE_ORDER == AH_BIG_ENDIAN) 136 #define _OS_REG_WRITE(_ah, _reg, _val) do { \ 137 (0x4000 <= (_reg) && (_reg) < 0x5000) ? \ 138 writel((_val), (_ah)->ah_sh + (_reg)) : \ 139 __raw_writel((_val), (_ah)->ah_sh + (_reg)); \ 174 140 } while (0) 175 #define _OS_REG_READ(_ah, _reg) \176 (( (_reg) >= 0x4000 && (_reg) < 0x5000) ?\177 __bswap32(*((volatile u_int32_t *)((_ah)->ah_sh + (_reg)))) :\178 *((volatile u_int32_t *)((_ah)->ah_sh + (_reg))))141 #define _OS_REG_READ(_ah, _reg) \ 142 ((0x4000 <= (_reg) && (_reg) < 0x5000) ? \ 143 readl((_ah)->ah_sh + (_reg)) : \ 144 __raw_readl((_ah)->ah_sh + (_reg))) 179 145 #else /* AH_LITTLE_ENDIAN */ 180 #define _OS_REG_WRITE(_ah, _reg, _val) do { \181 *((volatile u_int32_t *)((_ah)->ah_sh + (_reg))) = (_val);\146 #define _OS_REG_WRITE(_ah, _reg, _val) do { \ 147 writel(_val, (_ah)->ah_sh + (_reg)); \ 182 148 } while (0) 183 #define _OS_REG_READ(_ah, _reg) \184 *((volatile u_int32_t *)((_ah)->ah_sh + (_reg)))149 #define _OS_REG_READ(_ah, _reg) \ 150 readl((_ah)->ah_sh + (_reg)) 185 151 #endif /* AH_BYTE_ORDER */ 186 152 … … 208 174 * Linux-specific attach/detach methods needed for module reference counting. 209 175 * 210 * XXX We can't use HAL_STATUS because the type isn't defined at this211 * point (circular dependency); we wack the type and patch things212 * up in the function.213 *214 176 * NB: These are intentionally not marked __ahdecl since they are 215 * compiled with the default calling conve tion and are not called177 * compiled with the default calling convention and are not called 216 178 * from within the HAL. 217 179 */ 218 180 extern struct ath_hal *_ath_hal_attach(u_int16_t devid, HAL_SOFTC, 219 HAL_BUS_TAG, HAL_BUS_HANDLE, void* status);181 HAL_BUS_TAG, HAL_BUS_HANDLE, HAL_STATUS*); 220 182 extern void ath_hal_detach(struct ath_hal *); 221 183 trunk/ath_hal/ah_osdep.h
r1722 r1726 1 1 /*- 2 * Copyright (c) 2002-2006 Sam Leffler, Errno Consulting , Atheros3 * Communications, Inc.All rights reserved.2 * Copyright (c) 2002-2006 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 4 * 5 * Redistribution and use in source and binary forms are permitted 6 * provided that the following conditions are met: 7 * 1. The materials contained herein are unmodified and are used 8 * unmodified. 9 * 2. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following NO 11 * ''WARRANTY'' disclaimer below (''Disclaimer''), without 12 * modification. 13 * 3. Redistributions in binary form must reproduce at minimum a 14 * disclaimer similar to the Disclaimer below and any redistribution 15 * must be conditioned upon including a substantially similar 16 * Disclaimer requirement for further binary redistribution. 17 * 4. Neither the names of the above-listed copyright holders nor the 18 * names of any contributors may be used to endorse or promote 19 * product derived from this software without specific prior written 20 * permission. 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 3. Neither the names of the above-listed copyright holders nor the names 16 * of any contributors may be used to endorse or promote products derived 17 * from this software without specific prior written permission. 18 * 19 * Alternatively, this software may be distributed under the terms of the 20 * GNU General Public License ("GPL") version 2 as published by the Free 21 * Software Foundation. 21 22 * 22 23 * NO WARRANTY 23 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 24 * ''AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 25 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, 26 * MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 27 * IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE 28 * FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 29 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 30 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 31 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 33 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGES. 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 27 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 28 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 29 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 32 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 34 * THE POSSIBILITY OF SUCH DAMAGES. 35 35 * 36 36 * $Id$ … … 38 38 #ifndef _ATH_AH_OSDEP_H_ 39 39 #define _ATH_AH_OSDEP_H_ 40 /*41 * Atheros Hardware Access Layer (HAL) OS Dependent Definitions.42 */43 40 44 41 /* … … 58 55 #endif 59 56 60 /*61 * When building the HAL proper we use no GPL-contaminated include62 * files and must define these types ourself. Beware of these being63 * mismatched against the contents of <linux/types.h>64 */65 #ifndef _LINUX_TYPES_H66 /* NB: arm defaults to unsigned so be explicit */67 typedef signed char int8_t;68 typedef short int16_t;69 typedef int int32_t;70 typedef long long int64_t;71 72 typedef unsigned char u_int8_t;73 typedef unsigned short u_int16_t;74 typedef unsigned int u_int32_t;75 typedef unsigned long long u_int64_t;76 77 typedef unsigned int size_t;78 typedef unsigned int u_int;79 typedef void *va_list;80 #endif81 82 /*83 * Linux/BSD gcc compatibility shims.84 */85 #define __printflike(_a,_b) \86 __attribute__ ((__format__ (__printf__, _a, _b)))87 #define __va_list va_list88 #define OS_INLINE __inline89 90 /*91 * Delay n microseconds.92 */93 extern void __ahdecl ath_hal_delay(int);94 #define OS_DELAY(_n) ath_hal_delay(_n)95 96 #define OS_MEMZERO(_a, _n) ath_hal_memzero((_a), (_n))97 extern void __ahdecl ath_hal_memzero(void *, size_t);98 #define OS_MEMCPY(_d, _s, _n) ath_hal_memcpy(_d,_s,_n)99 extern void * __ahdecl ath_hal_memcpy(void *, const void *, size_t);100 101 #ifndef abs102 #define abs(_a) __builtin_abs(_a)103 #endif104 105 struct ath_hal;106 extern u_int32_t __ahdecl ath_hal_getuptime(struct ath_hal *);107 #define OS_GETUPTIME(_ah) ath_hal_getuptime(_ah)108 109 /*110 * Byte order/swapping support.111 */112 #define AH_LITTLE_ENDIAN 1234113 #define AH_BIG_ENDIAN 4321114 115 #ifndef AH_BYTE_ORDER116 /*117 * When the .inc file is not available (e.g. when building118 * in a kernel source tree); look for some other way to119 * setup the host byte order.120 */121 #ifdef __LITTLE_ENDIAN122 #define AH_BYTE_ORDER AH_LITTLE_ENDIAN123 #endif124 #ifdef __BIG_ENDIAN125 #define AH_BYTE_ORDER AH_BIG_ENDIAN126 #endif127 #ifndef AH_BYTE_ORDER128 #error "Do not know host byte order"129 #endif130 #endif /* AH_BYTE_ORDER */131 132 #if AH_BYTE_ORDER == AH_BIG_ENDIAN133 /*134 * This could be optimized but since we only use it for135 * a few registers there's little reason to do so.136 */137 static __inline__ u_int32_t138 __bswap32(u_int32_t _x)139 {140 return ((u_int32_t)(141 (((const u_int8_t *)(&_x))[0] ) |142 (((const u_int8_t *)(&_x))[1]<< 8) |143 (((const u_int8_t *)(&_x))[2]<<16) |144 (((const u_int8_t *)(&_x))[3]<<24))145 );146 }147 #else148 #define __bswap32(_x) (_x)149 #endif150 151 /*152 * Register read/write; we assume the registers will always153 * be memory-mapped. Note that register accesses are done154 * using target-specific functions when debugging is enabled155 * (AH_DEBUG) or we are explicitly configured this way. The156 * latter is used on some platforms where the full i/o space157 * cannot be directly mapped.158 *159 * The hardware registers are native little-endian byte order.160 * Big-endian hosts are handled by enabling hardware byte-swap161 * of register reads and writes at reset. But the PCI clock162 * domain registers are not byte swapped! Thus, on big-endian163 * platforms we have to byte-swap thoese registers specifically.164 * Most of this code is collapsed at compile time because the165 * register values are constants.166 */167 #if AH_BYTE_ORDER == AH_BIG_ENDIAN168 #define _OS_REG_WRITE(_ah, _reg, _val) do { \169 if ( (_reg) >= 0x4000 && (_reg) < 0x5000) \170 *((volatile u_int32_t *)((_ah)->ah_sh + (_reg))) = \171 __bswap32((_val)); \172 else \173 *((volatile u_int32_t *)((_ah)->ah_sh + (_reg))) = (_val); \174 } while (0)175 #define _OS_REG_READ(_ah, _reg) \176 (((_reg) >= 0x4000 && (_reg) < 0x5000) ? \177 __bswap32(*((volatile u_int32_t *)((_ah)->ah_sh + (_reg)))) : \178 *((volatile u_int32_t *)((_ah)->ah_sh + (_reg))))179 #else /* AH_LITTLE_ENDIAN */180 #define _OS_REG_WRITE(_ah, _reg, _val) do { \181 *((volatile u_int32_t *)((_ah)->ah_sh + (_reg))) = (_val); \182 } while (0)183 #define _OS_REG_READ(_ah, _reg) \184 *((volatile u_int32_t *)((_ah)->ah_sh + (_reg)))185 #endif /* AH_BYTE_ORDER */186 187 #if defined(AH_DEBUG) || defined(AH_REGOPS_FUNC) || defined(AH_DEBUG_ALQ)188 /* use functions to do register operations */189 #define OS_REG_WRITE(_ah, _reg, _val) ath_hal_reg_write(_ah, _reg, _val)190 #define OS_REG_READ(_ah, _reg) ath_hal_reg_read(_ah, _reg)191 192 extern void __ahdecl ath_hal_reg_write(struct ath_hal *ah,193 u_int reg, u_int32_t val);194 extern u_int32_t __ahdecl ath_hal_reg_read(struct ath_hal *ah, u_int reg);195 #else196 /* inline register operations */197 #define OS_REG_WRITE(_ah, _reg, _val) _OS_REG_WRITE(_ah, _reg, _val)198 #define OS_REG_READ(_ah, _reg) _OS_REG_READ(_ah, _reg)199 #endif /* AH_DEBUG || AH_REGFUNC || AH_DEBUG_ALQ */200 201 #ifdef AH_DEBUG_ALQ202 extern void __ahdecl OS_MARK(struct ath_hal *, u_int id, u_int32_t value);203 #else204 #define OS_MARK(_ah, _id, _v)205 #endif206 207 /*208 * Linux-specific attach/detach methods needed for module reference counting.209 *210 * XXX We can't use HAL_STATUS because the type isn't defined at this211 * point (circular dependency); we wack the type and patch things212 * up in the function.213 *214 * NB: These are intentionally not marked __ahdecl since they are215 * compiled with the default calling convetion and are not called216 * from within the HAL.217 */218 extern struct ath_hal *_ath_hal_attach(u_int16_t devid, HAL_SOFTC,219 HAL_BUS_TAG, HAL_BUS_HANDLE, void* status);220 extern void ath_hal_detach(struct ath_hal *);221 222 57 #endif /* _ATH_AH_OSDEP_H_ */ trunk/ath_rate/amrr/Makefile
r1686 r1726 52 52 include $(obj)/$(DEPTH)/Makefile.inc 53 53 54 INCS+= -I$(HAL) -I$( HAL)/$(OS) -I$(obj)/$(ATH) -I$(obj)/$(WLAN) \55 -I$(obj)/$( DEPTH)54 INCS+= -I$(HAL) -I$(ATH_HAL) -I$(HAL)/$(OS) -I$(obj)/$(ATH) \ 55 -I$(obj)/$(WLAN) -I$(obj)/$(DEPTH) 56 56 57 57 EXTRA_CFLAGS+= $(INCS) $(COPTS) trunk/ath_rate/onoe/Makefile
r1686 r1726 52 52 include $(obj)/$(DEPTH)/Makefile.inc 53 53 54 INCS+= -I$(HAL) -I$( HAL)/$(OS) -I$(obj)/$(ATH) -I$(obj)/$(WLAN) \55 -I$(obj)/$( DEPTH)54 INCS+= -I$(HAL) -I$(ATH_HAL) -I$(HAL)/$(OS) -I$(obj)/$(ATH) \ 55 -I$(obj)/$(WLAN) -I$(obj)/$(DEPTH) 56 56 57 57 EXTRA_CFLAGS+= $(INCS) $(COPTS) trunk/ath_rate/sample/Makefile
r1686 r1726 50 50 include $(obj)/$(DEPTH)/Makefile.inc 51 51 52 INCS+= -I$(HAL) -I$( HAL)/$(OS) -I$(obj)/$(ATH) -I$(obj)/$(WLAN) \53 -I$(obj)/$( DEPTH)52 INCS+= -I$(HAL) -I$(ATH_HAL) -I$(HAL)/$(OS) -I$(obj)/$(ATH) \ 53 -I$(obj)/$(WLAN) -I$(obj)/$(DEPTH) 54 54 55 55 EXTRA_CFLAGS+= $(INCS) $(COPTS) trunk/hal/ah.h
r1718 r1726 60 60 typedef void* HAL_BUS_HANDLE; /* opaque bus i/o handle */ 61 61 62 #include "ah_osdep.h"62 #include <ah_osdep.h> 63 63 64 64 /* trunk/net80211/Makefile
r1686 r1726 84 84 include $(obj)/$(DEPTH)/Makefile.inc 85 85 86 INCS+= -I$(HAL) -I$( HAL)/$(OS) -I$(obj)/$(WLAN) -I$(obj)/$(DEPTH)86 INCS+= -I$(HAL) -I$(ATH_HAL) -I$(obj)/$(WLAN) -I$(obj)/$(DEPTH) 87 87 88 88 EXTRA_CFLAGS+=$(INCS) $(COPTS)
