Changeset 3695

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Timestamp:
06/02/08 01:42:33 (7 months ago)
Author:
mickflemm
Message:
  • Add per rate power info for all modes (also works for v5 eeproms). Now we know card's maximum tx power for each rate !
  • Fix the above to work with <= v3.2 eeproms (with a different frequency mask).
  • Fix reporting of MAC revision (it's more important than version).
  • Add some documentation.

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  • ath_info/trunk/ath_info.c

    r3592 r3695  
    123123        {"2111", AR5K_SREV_PHY_2111}, 
    124124        {"5112", AR5K_SREV_PHY_5112}, 
    125         {"5112a", AR5K_SREV_PHY_5112A}, 
     125        {"5112A", AR5K_SREV_PHY_5112A}, 
    126126        {"2112", AR5K_SREV_PHY_2112}, 
    127         {"2112a", AR5K_SREV_PHY_2112A}, 
     127        {"2112A", AR5K_SREV_PHY_2112A}, 
    128128        {"SChip", AR5K_SREV_PHY_SC0}, 
    129129        {"SChip", AR5K_SREV_PHY_SC1}, 
    …… 
    278278#define AR5K_EEPROM_MODES_11G(_v)       AR5K_EEPROM_OFF(_v, 0x00da, 0x010d) 
    279279#define AR5K_EEPROM_CTL(_v)             AR5K_EEPROM_OFF(_v, 0x00e4, 0x0128)     /* Conformance test limits */ 
    280 #define AR5K_EEPROM_CHANNELS_5GHZ(_v)   AR5K_EEPROM_OFF(_v, 0x0150, 0x0150)     /* List of calibrated 5GHz chans 
    281                                                                                    Don't have a < 3_3 EEPROM so I 
    282                                                                                    just use the same offset */ 
     280#define AR5K_EEPROM_CHANNELS_5GHZ(_v)   AR5K_EEPROM_OFF(_v, 0x0100, 0x0150)     /* List of calibrated 5GHz chans */ 
     281#define AR5K_EEPROM_TARGET_PWR_OFF_11A(_v)      AR5K_EEPROM_OFF(_v, AR5K_EEPROM_CHANNELS_5GHZ(_v) + 0x0055, 0x0000) 
     282#define AR5K_EEPROM_TARGET_PWR_OFF_11B(_v)      AR5K_EEPROM_OFF(_v, AR5K_EEPROM_CHANNELS_5GHZ(_v) + 0x0065, 0x0010) 
     283#define AR5K_EEPROM_TARGET_PWR_OFF_11G(_v)      AR5K_EEPROM_OFF(_v, AR5K_EEPROM_CHANNELS_5GHZ(_v) + 0x0069, 0x0014) 
    283284 
    284285/* [3.1 - 3.3] */ 
    …… 
    836837/* 
    837838 * Read per channel calibration info from EEPROM 
    838  * This doesn't work on 2413+ chips (EEPROM versions >= 5), 
     839 * This doesn't work on 2112+ chips (EEPROM versions >= 4.6), 
    839840 * I only tested it on 5213 + 5112. This is still work in progress... 
     841 * 
     842 * This info is used to calibrate the baseband power table. Imagine 
     843 * that for each channel there is a power curve that's hw specific 
     844 * (depends on amplifier) and we try to "correct" this curve using offests 
     845 * we pass on to phy chip (baseband -> before amplifier) so that it can 
     846 * use acurate power values when setting tx power (takes amplifier's performance 
     847 * on each channel into account). 
     848 * 
     849 * EEPROM provides us with the offsets for some pre-calibrated channels 
     850 * and we have to scale (to create the full table for these channels) and 
     851 * interpolate (in order to create the table for any channel). 
    840852 */ 
    841853static int ath5k_eeprom_read_pcal_info(void *mem, u_int8_t mac_version, 
    …… 
    914926} 
    915927 
     928/* 
     929 * Read per rate target power (this is the maximum tx power 
     930 * supported by the card). This info is used when setting 
     931 * tx power, no matter the channel. 
     932 * 
     933 * This also works for v5 EEPROMs. 
     934 */ 
    916935static int ath5k_eeprom_read_target_rate_pwr_info(void *mem, 
    917936                                                  u_int8_t mac_version, 
    …… 
    934953        case AR5K_EEPROM_MODE_11B: 
    935954                rate_pcal_info = ee->ee_rate_tpwr_b; 
    936                 ee->ee_rate_target_pwr_num_b = AR5K_EEPROM_N_2GHZ_CHAN; 
     955                ee->ee_rate_target_pwr_num_b = 2; /* 3rd is g mode'ss 1st */ 
    937956                rate_target_pwr_num = &ee->ee_rate_target_pwr_num_b; 
    938957                break; 
    …… 
    946965        } 
    947966 
    948         for (i = 0; i < (*rate_target_pwr_num); i++) { 
    949                 AR5K_EEPROM_READ(o++, val); 
    950                 rate_pcal_info[i].freq = 
    951                     ath5k_eeprom_bin2freq(ee, (val >> 8) & 0xff, mode); 
    952  
    953                 rate_pcal_info[i].target_power_6to24 = ((val >> 2) & 0x3f); 
    954                 rate_pcal_info[i].target_power_36 = (val << 4) & 0x3f; 
    955  
    956                 AR5K_EEPROM_READ(o++, val); 
    957  
    958                 if (rate_pcal_info[i].freq == AR5K_EEPROM_CHANNEL_DIS || 
    959                     val == 0) { 
    960                         (*rate_target_pwr_num) = i; 
    961                         break; 
    962                 } 
    963  
    964                 rate_pcal_info[i].target_power_36 |= (val >> 12) & 0xf; 
    965                 rate_pcal_info[i].target_power_48 = ((val >> 6) & 0x3f); 
    966                 rate_pcal_info[i].target_power_54 = (val & 0x3f); 
    967         } 
    968  
     967        /* Different freq mask for older eeproms (<= v3.2) */ 
     968        if(ee->ee_version <= 0x3002){ 
     969                for (i = 0; i < (*rate_target_pwr_num); i++) { 
     970                        AR5K_EEPROM_READ(o++, val); 
     971                        rate_pcal_info[i].freq = 
     972                            ath5k_eeprom_bin2freq(ee, (val >> 9) & 0x7f, mode); 
     973         
     974                        rate_pcal_info[i].target_power_6to24 = ((val >> 3) & 0x3f); 
     975                        rate_pcal_info[i].target_power_36 = (val << 3) & 0x3f; 
     976         
     977                        AR5K_EEPROM_READ(o++, val); 
     978         
     979                        if (rate_pcal_info[i].freq == AR5K_EEPROM_CHANNEL_DIS || 
     980                            val == 0) { 
     981                                (*rate_target_pwr_num) = i; 
     982                                break; 
     983                        } 
     984 
     985                        rate_pcal_info[i].target_power_36 |= ((val >> 13) & 0x7); 
     986                        rate_pcal_info[i].target_power_48 = ((val >> 7) & 0x3f); 
     987                        rate_pcal_info[i].target_power_54 = ((val >> 1) & 0x3f); 
     988                } 
     989        } else { 
     990                for (i = 0; i < (*rate_target_pwr_num); i++) { 
     991                        AR5K_EEPROM_READ(o++, val); 
     992                        rate_pcal_info[i].freq = 
     993                            ath5k_eeprom_bin2freq(ee, (val >> 8) & 0xff, mode); 
     994         
     995                        rate_pcal_info[i].target_power_6to24 = ((val >> 2) & 0x3f); 
     996                        rate_pcal_info[i].target_power_36 = (val << 4) & 0x3f; 
     997         
     998                        AR5K_EEPROM_READ(o++, val); 
     999         
     1000                        if (rate_pcal_info[i].freq == AR5K_EEPROM_CHANNEL_DIS || 
     1001                            val == 0) { 
     1002                                (*rate_target_pwr_num) = i; 
     1003                                break; 
     1004                        } 
     1005 
     1006                        rate_pcal_info[i].target_power_36 |= (val >> 12) & 0xf; 
     1007                        rate_pcal_info[i].target_power_48 = ((val >> 6) & 0x3f); 
     1008                        rate_pcal_info[i].target_power_54 = (val & 0x3f); 
     1009                } 
     1010        } 
    9691011        /* return new offset */ 
    9701012        (*offset) = o; 
    …… 
    12181260        } 
    12191261 
     1262        /* 
     1263         * Read power calibration info 
     1264         */ 
    12201265        mode = AR5K_EEPROM_MODE_11A; 
    12211266        ret = ath5k_eeprom_read_pcal_info(mem, mac_version, ee, &offset, mode); 
    …… 
    12331278                return ret; 
    12341279 
    1235         offset = AR5K_EEPROM_TARGET_PWRSTART(ee->ee_misc1); 
     1280 
     1281        /* 
     1282         * Read per rate target power info 
     1283         */ 
     1284        offset = AR5K_EEPROM_TARGET_PWRSTART(ee->ee_misc1) + AR5K_EEPROM_TARGET_PWR_OFF_11A(ee->ee_version); 
    12361285        mode = AR5K_EEPROM_MODE_11A; 
    12371286        ret = ath5k_eeprom_read_target_rate_pwr_info(mem, mac_version, ee, &offset, mode); 
    …… 
    12391288                return ret; 
    12401289 
    1241         /* 
    1242          *XXX: 802.11a seems OK, but b and g 
    1243          *     don't. We have to find correct offsets 
    1244          *     for b and g because they don't start 
    1245          *     after 802.11a as above ;-( 
    1246          * 
    1247          *TODO: b/g 
    1248          */ 
     1290        offset = AR5K_EEPROM_TARGET_PWRSTART(ee->ee_misc1) + AR5K_EEPROM_TARGET_PWR_OFF_11B(ee->ee_version); 
     1291        mode = AR5K_EEPROM_MODE_11B; 
     1292        ret = ath5k_eeprom_read_target_rate_pwr_info(mem, mac_version, ee, &offset, mode); 
     1293        if (ret) 
     1294                return ret; 
     1295 
     1296        offset = AR5K_EEPROM_TARGET_PWRSTART(ee->ee_misc1) + AR5K_EEPROM_TARGET_PWR_OFF_11G(ee->ee_version); 
     1297        mode = AR5K_EEPROM_MODE_11G; 
     1298        ret = ath5k_eeprom_read_target_rate_pwr_info(mem, mac_version, ee, &offset, mode); 
     1299        if (ret) 
     1300                return ret; 
    12491301 
    12501302        return 0; 
    …… 
    12571309 
    12581310        for (i = 0; i < ARRAY_SIZE(ath5k_mac_names); i++) { 
    1259                 if (val == ath5k_mac_names[i].sr_val) { 
     1311                if (val >= ath5k_mac_names[i].sr_val) { 
    12601312                        name = ath5k_mac_names[i].sr_name; 
    1261                         break; 
    12621313                } 
    12631314        } 
    …… 
    21872238                printf("|          Calibration data for 802.11b operation         |\n"); 
    21882239                dump_calinfo_for_mode(AR5K_EEPROM_MODE_11B, ee); 
     2240                dump_rate_calinfo_for_mode(AR5K_EEPROM_MODE_11B, ee); 
    21892241                dump_power_calinfo_for_mode(AR5K_EEPROM_MODE_11B, ee); 
    21902242                printf("\n"); 
    …… 
    21952247                printf("|          Calibration data for 802.11g operation         |\n"); 
    21962248                dump_calinfo_for_mode(AR5K_EEPROM_MODE_11G, ee); 
     2249                dump_rate_calinfo_for_mode(AR5K_EEPROM_MODE_11G, ee); 
    21972250                dump_power_calinfo_for_mode(AR5K_EEPROM_MODE_11G, ee); 
    21982251                printf("\n");